Taiwan Semiconductor Manufacturing Co (TSMC) has announced plans to manufacture advanced 3-nanometer semiconductors at its new facility in Kumamoto, Japan, marking a strategic enhancement of its technology roadmap in the country. This move signals a significant milestone for Japan’s semiconductor ambitions and could impact key sectors reliant on next-generation chip technology.
According to TSMC’s CEO CC Wei, the company will introduce 3-nanometer production capabilities at its second Kumamoto facility. The plan was disclosed during a recent meeting with Prime Minister Sanae Takaichi, making it the first time such advanced chips will be mass-produced in Japan. Previously, TSMC’s project outline called for the production of 7nm chips by late 2027. Individuals with knowledge of the matter revealed the shift to 3nm as an upgrade of the original plan.
To support this expanded initiative, TSMC intends to increase its total investment in the Kumamoto site to JPY 2.6 trillion, according to a report from the Yomiuri newspaper.
Japan’s government continues to prioritize domestic semiconductor manufacturing, viewing it as integral to economic security. Under the Takaichi administration, the Ministry of Industry plans to raise funding for advanced chip and AI development to around JPY 1.23 trillion in the coming fiscal year, nearly four times the previous allocation.
The adoption of 3nm semiconductor manufacturing at TSMC’s upcoming plant marks a critical step in Japan’s strategy to elevate its local chip industry and meet the government’s economic and technology targets.
